Prof. Shahar Kvatinsky

The Technion ASIC2 Research Group

The goal of the ASIC² Technion Research Group, led by Professor Shahar Kvatinsky, is to explore novel applications of emerging technologies in different fields such as Computer Architecture, VLSI Systems, Integrated Circuit Design, and Hardware Security. Currently, our research focuses on performing logic using memory cells to build the memristive memory processing unit (mMPU), mixed-signal circuits, RF circuits, neuromorphic computing, cytomorphic systems, deep learning accelerators, internet-of-things, and hardware security. We also develop device, circuit and architecture models and tools.

In the context of this research, resistive switching devices such as Resistive RAM (RRAM), Spin-Transfer Torque Magnetoresistance RAM (STT-MRAM), Phase Change Memory (PCM), and 3D Xpoint are used for various applications and are characterized in the ASIC² laboratory. ASIC² is also very much involved in developing simulators, device models and tools for computer-aided design.

Contact details:

Group website:

Contact: Eric Herbelin, ASIC2 Lab Manager,