The research is conducted by the Accelerated Computer Systems Lab (ACSL) which was established by Prof. Mark Silberstein at the Electrical Engineering department of the Technion in 2013. Prof. Silberstein (https://sites.google.com/site/silbersteinmark) is a world recognized expert in computational accelerators (such as GPUs and FPGAs) and accelerated systems, his research spans broad range of system projects on hardware architecture, programming tools, operating systems, security and privacy, high concurrency servers and high-speed I/O. Prof. Silberstein is regularly invited to give talks on the subject at national and international venues. Prof. Silberstein is the academic head of the lab and the research team leader, his team members are: Pavel Lifshits – Lab engineer, Gabi Malka – Research engineer, Eitan Ziv – M.Sc. student and Shai Bergman – Ph.D student.
The goal of our project in GenPro consortium is definition of:
Software-hardware interfaces, OS abstractions and programming models for orchestration of embedded accelerators on a RISC-V-based SoC.
We are working on development of software environment which consists of the OS or a runtime, and enables construction of user-programmable data flow among the accelerators (based on RISC-V and/or managed by RISC-V), whereas the system is provisioned to achieve the maximum system performance (for example throughput).
The main research questions which are addressed as part of this project cover a broad range of challenges of software-hardware co-design, including efficient address translation among accelerators, data flow scheduling, OS management interface, cache management, and others.
Dr. Boris Herscovici