The BGU Research team:
The BGU research team is headed by Dr. Shlomo Greenberg and Dr. Yehuda BenShimol from the school of Electrical and Computer Engineering. The team includes 26 students (3 PhD students, 7 MSc students, and sixteen 4’th year undergraduate students) doing their thesis and final projects in the area of computer architecture, multi-core and multithreading architecture, performance evaluation, efficient hardware implementation of deep neural networks, real-time voice and image processing, parallel processing, hardware acceleration, high-performance VLSI heterogeneous platforms, and efficient hardware and software co-design techniques.
Synopsis of GenPro research activities:
A. Efficient multi-core architecture for RISC-V based platform
Within this research project we develop efficient RISC-V based multi-core architecture to support deep neural network platforms applied to real-time voice and image processing as well as high-throughput networking application. One of the most challenging tasks in developing a multi-core-based architecture is to efficiently utilizing the common memory resources as well as sharing the cache memory in the different cache levels. This research focuses on performance evaluation of a new proposed cache architecture suggesting common L1 level cache using various arbitration algorithms and memory’s bank configuration.
B. Developing multi-thread support for RISC-V
In this project, we develop multi-threading hardware architecture for the RISC-V processor to support efficient instruction-level parallelism (ILP). This research focuses on performance improvement using multithreading for RISC-V single-core using a single issue. The main challenge is to increase the number of possible executed instructions per cycle and hiding the latency while accessing memory. This can be carried out with efficient implementation of a multi-threading architecture, enabling parallel execution of multi-threads in different stages of the RISC-V pipeline, while utilizing the common pipeline resources with minimum hardware overhead per single thread. Multithreading support also requires developing unique scheduling algorithms
Dr. Shlomo Greenberg, email@example.com
Dr. Yehuda BenShimol, firstname.lastname@example.org